1. Field of the Invention
The present invention relates to circuits for the detection of signals from memory devices wherein binary information is represented by the level of charge, and, more particularly, relates to an improved differential charge transfer sense amplifier circuit.
2. Prior Art
U.S. Patent No. 3,760,381 entitled "Stored Charge Memory," issued Sept. 18, 1973 to Y. L. Yao and assigned to the present assignee shows a sensing circuit arrangement which is similar to the present invention. The patent discloses a differential amplifier or latch arrangement which incorporates the charging up of bit line capacitance of two halves of a bit line to a given value of voltage. The present invention is distinct over the prior art in that it incorporates a special dynamic latching circuit and uses a field effect transistor device across the latch nodes.
Other known prior art references include U.S. Pat. Nos. 3,514,765 and 3,541,530 and an article entitled "Storage Array and Sense/Refresh Circuits for Single Transistor Memory Cells," by K. U. Stein et al, 1973 IEEE International Solid-State Circuits Conference, February, 1973. These references are distinct from the present invention for the aforesaid reason and also because the sense amplifier described herein uses the energy available during the initial cycles in order to provide reduced power requirement. This feature is not found in the prior art references.